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Part Number: DS200DENCF1BDC
Manufacturer: General Electric
Series: Mark V
Product type: Software PROM Set
Availability: In Stock
Country of Manufacture: United States (USA)
DS200DENCF1BDC is a Software PROM Set designed and developed by GE. It is a part of Mark V control system. The control system has embraced advanced microprocessors to a greater extent, featuring an improved system structure. It employs SIFT technology for control, incorporates a new triple-redundant protective module, and boasts substantial hardware diagnostic enhancements. With standardized modular construction, it achieves superior quality, quicker installation, heightened reliability, and streamlined online maintenance procedures.
Within a TMR control panel, each of the "Q" cores independently reads inputs from the driven device. A crucial input, such as turbine speed, is obtained from three independent sensors. Less critical signals are collected via a single sensor connected to all three processors.
Logic signals are received by the Digital Control Core (DCC) card, which serves as a data manager and a storage area for all input and output (I/O) signals (refer to Figure 2-3). These signals are then transmitted from the DCC card to the Local Control Communications Buffer (LCCB) card and subsequently to the Data Exchange Network (DENET).
Once the information is on the DENET, each processor retrieves all three values (one from "R," "S," and "T" respectively) and conducts a two-out-of-three software vote. This voting process is executed individually on the LCCB card within each core. The resulting voted values are stored on the DCC card of each processor, where they can be utilized for unit operation.
This configuration ensures that all three cores utilize the same values for internal calculations based on current data. The information on the DENET is also examined by the "C" core, which independently performs a two-out-of-three vote. Any voting mismatches in any of the cores are detected by the DCC card in "C," leading to the annunciation of a diagnostic alarm.
The process described above is analogous to how analog signals are managed within the panel. The values for "Q" are read into all three cores, and the median value is selected. This median value is stored on the DCC card and is accessible for use in performing critical calculations necessary for turbine operation.
This control scheme, known as Software Implemented Fault Tolerance (SIFT), ensures that all values used in turbine control calculations are consistent across all three processors. For instance, if there is a sensor input failure in "S," it does not influence the processor to incorporate the faulty value into its calculations because the software vote effectively masks it. Instead, "S" employs the voted value from the three processors and proceeds with the calculation. Consequently, different pre-vote turbine trip signals in multiple processors do not trigger a turbine trip.
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What is DS200DENCF1BDC?
It is a Software PROM Set designed and developed by GE
Could you explain the voting process used in the Mark V Control System, and why is it important?
Once the information is on the DENET, each processor retrieves three values and conducts a two-out-of-three software vote. This process ensures consistency in data interpretation and is vital for accurate control signal interpretation.
How are voting mismatches detected in the Mark V Control System, and what happens when they occur?
Any voting mismatches among the cores are identified by the DCC card in the C core. When a mismatch is detected, the system generates a diagnostic alarm, indicating a potential issue that requires attention.
Is there a parallel between how analog signals and digital signals are handled in the control panel?
Yes, the process of handling analog signals is similar to the way digital signals are managed. Values for Q are read into all three cores, and the median value is selected. This median value is then used in critical calculations for turbine operation.
