IS200VAICH1ACA - Analog I/O Board

SPECIFICATIONS

Part No.: IS200VAICH1ACA
Manufacturer: General Electric
Country of Manufacture: United States of America (USA)
Temperature: 0 to 60 oC
Size: 26.04 cm high x 1.99 cm wide x 18.73 cm deep
Power consumption: Less than 31 MW
Compressor stall detection: Detection and relay operation within 30 ms
Number of channels: 24 channels
Input span: 4-20 mA
Power consumption: Less than 31 MW
Product Type: Analog I/O Board
Availability: In Stock
Series: Mark VI

Functional Description

IS200VAICH1ACA is an Analog I/O Board developed by GE. It is a part of Mark VI control system. The Analog Input/Output board facilitates the processing of analog signals within the control system. The board is equipped to handle 20 analog inputs and oversee 4 analog outputs. It integrates signal conditioning, an analog multiplexer (MUX), as well as analog-to-digital (A/D) and digital-to-analog (D/A) converters. The board accommodates 20 analog inputs and controls 4 analog outputs. Each terminal board has 10 inputs and 2 outputs.

Connection and Processing

• Terminal Connection: Cables link the terminal board to the VME rack housing the VAIC processor board.
• Signal Processing: Digitizes input signals and transmits them over the VME backplane to the VCMI board, which then forwards them to the controller. Conversely, digital values for outputs are transformed into analog currents and dispatched through the terminal board to the customer circuit.

Configuration

• TMR Redundancy: Supports both simplex and TMR applications. In a TMR setup, input signals on the terminal board are distributed to three VME board racks (R, S, and T), each hosting a VAIC.
• TMR Fault Tolerance: Output signals are managed by a specialized circuit that ensures fault tolerance. If a hardware failure occurs, the faulty VAIC is isolated from the output, allowing the remaining two boards to maintain correct current production.
• Simplex: Single Processing Unit: In a simplex configuration, the terminal board supplies input signals to a single VAIC. This VAIC is responsible for generating all output currents.
  By offering both simplex and TMR capabilities, the board ensures flexibility and reliability in processing analog signals within the control system.

Cable Connections

The cable connections to the terminal boards are established at the J3 and J4 connectors situated on the lower section of the VME rack. These connectors utilize a latching mechanism to ensure the cables remain securely attached. To initiate the system, follow these steps:

• Power Up the VME Rack: Activate the power source for the VME rack.
• Check Diagnostic Lights: Inspect the diagnostic lights positioned at the top of the front panel. These lights provide essential status information regarding the operation of the system.

Noise suppression on inputs

• The first 10 circuits (J3) are equipped with a hardware filter featuring a single pole down break at 500 rad/sec.
• The second 10 circuits (J4) are equipped with a hardware filter featuring a two-pole down break at 72 and 500 rad/sec.
• Additionally, a software filter, configurable for 0, .75, 1.5 Hz, 3 Hz, 6 Hz, and 12 Hz, utilizes a two-pole low-pass filter to further mitigate noise.

The WOC team is always available to help you with your Mark VI requirements. For more information, please contact WOC.

Frequently Asked Questions

What is IS200VAICH1ACA?
It is an Analog I/O Board developed by GE under the Mark VI series.

What is the purpose of noise suppression on inputs?
Noise suppression on inputs is achieved through hardware and software filters to ensure accurate and reliable signal processing. The hardware filters have specific frequency cutoffs, while the software filter offers configurable options for further noise reduction.

How does the system detect faults in TMR configurations?
In TMR systems, if one signal deviates from the voted value by more than a predetermined limit, a fault is triggered. This early detection mechanism helps identify potential issues in one channel before they escalate.

What happens if there's a mismatch in board identification during chip reading?
If a mismatch is detected during chip reading by the I/O processor, a hardware incompatibility fault is generated. This ensures that the system operates with compatible and correctly identified components, minimizing the risk of errors or malfunctions.